NOTICE: The DVCon website was updated after the publication of this article. The Tuesday afternoon panel is now properly displayed to be one hour long, and Exhibits hours are also displayed on the right.
This year's edition of DVCon will start on Monday February 27. DVCon is the premier conference covering issues of functional design and verification dealing with subjects as varied as technology, techniques, standards, and methods. The conference is sponsored by Accellera Systems Initiative, the leading industry consortium that sponsors the development and support of standards for electronic design and verification.
Every January, or February if you are EDAC, leaders of our industry forecast what will be important and how the financial picture of EDA will be in the coming year. This year has not been different. I have chosen just three such forecasts. I want to highlight both non-traditional and traditional sources. Progress comes from looking at things from different points of view, and traditional financial analysis is much better than wild-eyed wishing. I could not resist, of course, from providing my own observations.
Anyone with a sliver of ethics would agree that stealing is not a social behavior to be supported or condoned. Yet stealing of intellectual property goes on every moment on the internet. It has become almost a badge of honor for some people to download music, movies, or other intellectual content for free when instead a payment would be required.
As I have already written more than once, the 20 nm process is introducing a new reality in IC design and manufacturing. This is just a preview of how much harder things are going to be at 14 nm. Third party confirmation did not make me wait long. A press release from Synopsys contained the following statements.
A few weeks ago I had the opportunity to visit Blue Pearl Software, one of the emerging EDA companies in Silicon Valley. Blue Pearl Software was started six years ago with the goal of doing design analysis at the functional level and providing designers with control of their design from RTL through synthesis. Another goal as important as the first was to automatically generate timing constraints and allow the verification of their correctness.
Someone's numbers do not make sense
Just a day after the news of the proposed acquisition by Synopsys, Magma reported results for its second quarter of the fiscal year (May to April). The data shows a company that is rebounding well from its 2009 fiscal year low. The significant dip in Magma's performance for fiscal 2008 and 2009 has been attributed by almost all analysts to the marketing and sales problems the company experienced while embroiled in the legal battle with Synopsys over intellectual property rights.
The behavioral scientists that analize the EDA industry were sure of one thing above others: there would never be a deal between Synopsys and Magma. Their wisdom said that Aart and Rajeev despised one another, there was too much bad blood between the two companies after the legal action by Synopsys pushed Magma to the brink of oblivion, and Magma was a small player in the EDA business that could never again be a serious contender for number 3. The two companies could never do business together was the strongly held belief.
When reading the Silicon One paper from Magma Design Automation, one is struck by the style of the document. In the EDA industry we are accustomed to technical papers that assume strong technical knowledge of the semiconductors industry. We talk to ourselves expecting that those outside our industry will somehow appreciate both the complex problems and the elegance of the solutions. Magma does no such thing. Its audience, which includes financial and business professionals, is given an accurate, yet understandable description of the requirements of our industry and the possible solutions.
The first paragraph of the official release from Apache promises new help for designers. Power consumption is not just a problem for portable devices, but, translated in heat, is also a major issue with electronics that remain plugged to a socket. Therefore one cannot but rejoice from the announcement. Or can we? Based on the contents of the press release, many doubts remain starting with the title that implies a new model of not just power distribution but also a dynamic impact of power consumption on the circuit behavior.
The acquisition by ARM of Prolific underscores, if there was still a necessity, the difficulties of bringing to manufacture designs targeting the 20 nm process. It has become clear that the cooperation between EDA tools suppliers and design houses must be practically air tight in order to succeed. Let's not forget that just a few weeks ago ARM had announced the successful tapeout of its Cortex-A15 MPCore achieved with the close collaboration of TSMC and Cadence. The experience certainly thought them something and I believe the Prolific acquisition is one of the results.