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Edge on EDA

Chenming Hu wins 2013 Phil Kaufman Award

Fri, 2013-04-05 11:31 — Gabe Moretti

This year the Phil Kaufman award committee has gone back to more traditional origins for its awardees: UC Berkeley. Dr. Chenming Hu will receive the award at this year's DAC conference in Austin Texas. The Phil Kaufman Award honors individuals who have had demonstrable impact on the field of EDA through technology innovations, education/mentoring, business or industry leaderships. The proximity of Silicon Valley and UC Berkeley is not a geographical accident, but an example of the synergy between business development and research.

Synopsys Signs Multiyear Collaboration Agreement with ARM

Tue, 2013-02-12 17:13 — Gabe Moretti

A little over two and a half years ago, or 0.4 light years in EDA time, Synopsys purchased Virage Logic. With the acquisition it obtained the ARC Risc processor family. Observers concluded that Synopsys was going to become a serious ARM competitor. Therefore, people concluded, ARM will not want to continue to be a Synopsys customer leaving open the possibility for a Synopsys competitor to obtain a valuable corporate customer.

Cadence tried, and so did other companies. During one of my discussions with Chi Foon I asked about the danger. His answer was very reassuring: a tempest in a tea pot that was being managed. And he has been proven correct.

Counting Visitors

Fri, 2012-12-21 17:16 — administrator

Once again the world of EDA, well a subset of that world at least, is having fits. This time, and it is not the first time, the cause is an article by John Cooley. John has leaked information he obtained I am told third hand from uncommon channels to continue his private war with Daniel Nenni. You can read it at http://www.deepchip.com/items/0516-07.html.

A Practical Approach to Chip-level Assertion-Based Verification

Mon, 2012-10-01 08:50 — administrator

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Mitsuhiro Matsumoto, EVE KK

Are you using assertions in your logic verification?

Assertion-based verification is rapidly gaining popularity as a methodology for more efficient SoC debugging. Both HDL simulators and property-based formal verification tools are recognized as assertion-based verification platforms.

Going Against the Big Boys - Life in EDA

Mon, 2012-09-17 08:53 — administrator

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Ralph Zak

Everyone loves a good underdog story. In EDA, that covers about 98% of the suppliers. There are lots of them. In an industry in which three companies with broad product lines control the vast majority of the revenue, about 200 other companies, with point tools principally, battle the giants head-to-head in their own narrow product space.

Supporting the Community

Tue, 2012-09-04 10:21 — administrator

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Jeff Hall, Central Area Sales Director, EVE

EVE has been working in partnership with the high-tech community from Austin, Texas, for a number of years now. One recent example of our community outreach is the Door64 event we sponsored in mid July at the Six Lounge in downtown Austin. More than 160 members of Door64 registered to attend.

Results from DAC Survey

Tue, 2012-08-21 11:47 — administrator

Cindy Wilson, Marcom Manager, EVE
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The EVE Marketing Department takes the opportunity during each live event where we exhibit, such as DAC, to survey attendees who stop by to see us. This year’s DAC was no exception and we were pleased with the number of attendees willing to take time to answer our questions.

A la carte or the specials menu for your electrical design software?

Fri, 2012-08-03 16:17 — administrator

By Steve Chidester, Zuken

As a software vendor we serve a broad range of industries, each with customers who have their own range of needs. This is sometimes causes us a dilemma, because we want to meet individual needs as closely as possible; and at the same time we have to resist trying to be all things to all people.

The obvious risk in trying to be all things to all people is that you spread yourself too thinly and become a jack of all trades and master of none. In our business, there is no prize for finishing second.

Hardware-Assisted Verification Platforms for Verifying Video and Graphics Chips

Wed, 2012-08-01 12:03 — administrator

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Lauro Rizzatti

Hardware-assisted verification platforms have been proven to support the verification needs of modern SoC realization. These platforms offer multi-MHz performance and comprehensive hardware debugging capabilities, which enable pre-silicon hardware/software co-verification and software validation.

However, each ASIC/SoC application also has its own unique challenges and requirements, and supporting their needs requires more than just fast emulation and 100% design accessibility. SoC realization also requires a high-performance, system-level verification platform surrounding the emulated design, including many application-specific peripherals and interfaces.

SoC Verification Made Easy

Tue, 2012-07-10 09:13 — administrator

Ralph Zak, Business Development Director, EVE

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Yes, you read the headline correctly and there are no typos in it. For 10 years or more, companies such as EVE have focused their engineering resources on providing high-performance, application-specific validation solutions with the goal to simplify the process of verifying complex SoC designs.