Accellera Systems Initiative has released version 2.3.0 of its SystemC open source proof-of-concept library, now available at no charge. Compatible with the newly revised IEEE 1666 "Standard SystemC Language Reference Manual," announced by the IEEE Standards Association in November 2011, version 2.3.0 provides a number of important new features, including support for transaction-level modeling (TLM).
Calypto Design Systems, Inc. announced Catapult Low-Power (LP). For those that were wondering why Mentor had given Catapult-C to Calypto, and those who having accepted the transfer were wondering what in the world Calypto would do with it, the answer arrived today in the form of a product announcement.
To begin with it is clear how Catapult-C fits with the original Calypto products. I t is a link between ESL and RTL that is parallel to the SLEC product. But the new release is much more than that. It incorporates some of the SLEC technology as well as some of the PowerPro technology, providing a HLS that is also power aware.
For many years the EDA language architects have worked toward a system architecture language that could allow the "correct by construction" approach to system level design. The Unified Modeling Language (UML), was created by the Object Management Group and adopted as a supported technology by that group in 1997. it6 is used mostly to model software intensive systems, but has been shown to be useful in modeling hardware/software systems as well.
Although there have been alternative developments that more specifically target hardware systems, like Rosetta, they have not succeeded in gathering enough interest from potential users, and the Rosetta project remains unfinished. Mentor Graphics has always been a major participant in modeling languages engineering, playing key roles in VHDL and SystemVerilog for example. The company has developed its own version of UML, called xUML that incorporates extensions to the languages that Mentor deems appropriate to aid in the use of the language for hardware/software architectures.
In a move reminiscent of the style of Carl Icahn, Mentor lowered its costs by exchanging Catapult C with stock of Calypto. In this manner no money exchanged hands and Mentor lowered its development and maintenance costs in the very competitive area of High Level Synthesis (HLS). The move came as a surprise to those involved in the Catapult C project. Simon Block, even a couple of weeks ago had agreed to submit an article about the product for the August issue of Assembling The Future newsletter.
Mentor Graphics Corporation has been focused on embedded systems development for some time. It has announced a new program composed of the Mentor® Embedded professional services and products specifically for hardware companies. The Mentor Embedded Hardware Enablement Program provides a spectrum of comprehensive services and training for embedded Android, Linux®, open source tools (GNU, GCC, Eclipse), user interface (UI) creation, and vertical markets, including in-vehicle infotainment (IVI), smart energy and retail applications.
Synopsys, Inc. is pursuing its expansion into non-traditional EDA markets. These markets are all related to EDA in the sense that they address systems that contain electronic components built using traditional EDA tools. The corporation shows to be very focused to provide system solutions to its customers that span design, development and production of complete systems.
Synopsys has released a new prototyping environment that combines technology from Virtio, Coware, and Vast. When the Virtio acquisition was announced in May of 2006, few if any would have stated that the acquisition was the first step in the implementation of a long range plan. Five years plans, and possibly longer, that are actually implemented are extremely rare in EDA. And yet, last year the company acquired CoWare, another company with technology closely related to virtual prototyping, and Vast Systems, a company with IP that is used by many automotive company around the world.
All is left is to wait and see how the Virage Logic acquisition will fit in the virtual prototyping market: I have ideas, but they are not for free.
The new flow is a direct result of the EDA360 vision published just about one year ago. The document recognizes that systems are designed and developed based on the application they provide, not on the latest capabilities of hardware manufacturing. hardware and software components are chosen given the requirements of the application, and in the majority of cases, the software components demand the majority of the development effort, and thus are responsible for the larger share of the cost.
Over the years, the semiconductor industry has been using C/C++ high-level synthesis (HLS) tools as one way to address the complexity of implementation and verification of hardware acceleration cores due to the growing complexity of standards in video, imaging, wireless, and other multimedia and communications applications. However, these challenges have limited the adoption and scalability of these tools. This paper will discuss some of these challenges and introduce Synphony C Compiler (SCC), a new high-level synthesis product from Synopsys that includes some unique and effective technologies that address the challenges in high-level synthesis adoption.
Synopsys took two major steps in the prototyping market segment during DVCon. First it released a new prototyping board, the HAPS-600 and then, the following day, it announced the release, in collaboration with Xilinx, of a FPGA-Based Prototyping Methodology Manual(FPMM). The product and the manual complement the family of virtual prototyping tools that Synopsys already offers. Thus software developers are now supported through the entire life of a prototype, enhancing the ability to develop embedded software in parallel with the SoC hardware. Synopsys plans to create a community of practicing prototyping engineers and users around the book.