On Friday, July 30, the Portland Business Journal reported that Carl Icahn has now reached a 14.13% ownership of Mentor Graphics. If you remember, Mentor passed a shareholder rights plan (see http://www.gabeoneda.com/news/mentor-graphics-adopts-shareholder-rights-...) to defend itself against unwanted takeover maneuvers. The plan stipulates that if an unfriendly shareholder accumulates more than 15% of shares in the company, all other shareholders of record as of July 6, 2010 will receive one share for every share held at the discount price of 50%. The purpose is to dilute the percentage of shares held by the unwanted "intruder". Let's do the numbers.

Northwest Logic and Aldec, Inc. announce that they have verified full compatibility between Northwest Logic's Intellectual Property (IP) Cores and Aldec's RTL Simulators. Northwest Logic is a provider of high-performance, easy-to-use IP Cores, including DDR3/2, PCIe 3.0/2.0/1.1 and MIPI IP Cores. Aldec is a leading provider of RTL and gate-level mixed language Simulators, including Aldec Riviera-PRO™ 2010.06 and Active-HDL 8.3 RTL Simulators.

Accellera, the electronics industry organization focused on the creation and adoption of Electronic Design Automation (EDA) standards and Intellectual Property (IP) standards, announced today that its Board of Directors has elected officers for its 2010/11 membership year.

SEMATECH and the Semiconductor Metrology Systems (SMS) division from Carl Zeiss announced today that Zeiss’ next-generation photomask registration and overlay metrology system has successfully passed a key development milestone. The jointly developed system – called PROVE™ - demonstrated the measurement capability for advanced photomasks for the 32 nm node and below. In a series of test runs, the key specifications -- 0.5 nm repeatability and 1.0 nm accuracy in image placement, registration and overlay measurement -- were verified.

Cadence is still in the process of righting the ship, but the maneuver is proving effective so far. As has been the case with Magma, being in debt is no fun at all, and it requires financial operations that appear strange to engineers accustomed to straight forward solutions. Thus, in the EDA industry which is dominated by engineers and by unabated competition, financial results are often read in order to find weaknesses instead of strengths. I have already received calls about Cadence "embellishing the results. Just as it was the case with Magma last year, when the qualified report by the auditors created consternation only for the source of the problem to be quickly resolved, the fact that Cadence received a $15 million dollars that was scheduled for 3Q in 2Q. Once again, though, the critics have not taken into account the transparency with which the company reported it and the fact that the guidance for 3Q fully reflects the facts.

Intel Corporation today announced an important advance in the quest to use light beams to replace the use of electrons to carry data in and around computers. The company has developed a research prototype representing the world’s first silicon-based optical data connection with integrated lasers. The link can move data over longer distances and many times faster than today’s copper technology; up to 50 gigabits of data per second. This is the equivalent of an entire HD movie being transmitted each second.

Synopsys, Inc. today announced the addition of the DesignWare® 96 dB Hi-Fi Audio IP in the 40-nanometer (nm) and 55-nm process technologies to its broad portfolio of audio IP solutions. Synopsys has stated that it is the first IP provider to offer audio codecs, digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) in these advanced processes. The DesignWare Audio IP portfolio offers performance levels from 80 dB to 103 dB and is available in more than 20 different process nodes, from 180-nm to 60-nm, and now down to 40-nm. The IP is targeted for consumer electronic applications requiring Hi-Fi playback and record capabilities with very low power consumption and small silicon area, such as portable media players, mobile phones, smart phones, CD/DVD/Blu-ray players/recorders and digital cameras.

Jasper Design Automation today announced the availability of Proof Kits for the DFI (DDR-PHY) specification, an interface protocol between memory controller logic and PHY interfaces that reduces integration costs while enabling performance and data throughput efficiency. Jasper high-performance, high-capacity formal verification provides the most complete solution for dealing with the complex protocols and timing parameters specified by DFI.

Synopsys, Inc. announced that Oticon taped out the digital signal processor (DSP) chipset for their next-generation hearing-aid devices ahead of schedule using Synopsys' Design Compiler™ Graphical RTL Synthesis, a key component of the Galaxy™ Implementation Platform. Engineers at Oticon, a world leader in the design, development and manufacture of hearing aids, needed to add new features to the next-generation DSP without increasing design area and while maintaining a very tight schedule. This was especially challenging due to the routing congestion caused by the added functionality, which could have led to multiple design iterations and a longer design schedule. To alleviate this congestion, Oticon's RTL designers deployed the congestion optimizations in Design Compiler Graphical during RTL synthesis, resulting in an easy-to-route netlist and predictable design closure ahead of schedule.

Magma® Design Automation announced the appointment of Dave Sugishita to its board of directors. Sugishita, a veteran of the semiconductor and electronic design automation (EDA) industries, is currently chairman of the board at Atmel Corporation. His career spans various senior financial management positions, including serving as chief financial officer at EDA supplier Synopsys, and at semiconductor companies Actel and Micro Component Technology; as corporate controller at semiconductor capital equipment supplier Applied Materials; and as vice president of Finance at National Semiconductor.