Not satisfied with one acquisition per day, Synopsys, Inc. has acquired technology, engineering resources and other assets of Synfora, Inc., a provider of C/C++ high-level synthesis tools used to design complex systems-on-chips (SoCs) and FPGAs. The asset acquisition strengthens Synopsys' position in system-level design and verification and enhances the company's FPGA-based prototyping solutions.

Magma® Design Automation announced that UMC has standardized on SiliconSmart ACE for standard cell and I/O cell characterization and modeling. UMC conducted a thorough evaluation of multiple IP characterization tools from leading electronic design automation (EDA) vendors. SiliconSmart ACE was shown to meet the accuracy, throughput and quality of results UMC required. Magma’s world-class technical support was also influential in UMC’s decision to standardize on SiliconSmart ACE.

Today is a busy day for financial analysts that follow the EDA industry. First Cadence made the news with its announcement of its offering of $300 million of Convertible Senior Notes, and then Synopsys announced a definitive agreement to purchase Virage Logic.

Synopsys, Inc. and Virage Logic Corporation today announced they have signed a definitive agreement for Synopsys to acquire Virage Logic. Virage Logic's offering will complement Synopsys' DesignWare(r) interface and analog IP portfolio by adding embedded memories with test and repair, non-volatile memories (NVMs), standard cell libraries, and programmable cores for control and multimedia sub-systems. With this acquisition, Synopsys will strengthen its ability to help design teams achieve their system-on-chip (SoC) development goals by providing them with a more comprehensive portfolio of production-proven, high-quality IP and excellent worldwide technical support.

Cadence Design Systems, Inc. announced the pricing of its offering of $300 million principal amount of cash convertible senior notes due 2015. The notes are being offered and sold to qualified institutional buyers pursuant to Rule 144A under the Securities Act of 1933, as amended. Cadence also granted the initial purchasers of the notes an option to purchase up to an additional $50 million principal amount of notes to cover over-allotments. The offering is expected to close on June 15, 2010, subject to customary closing conditions.

Cadence Design Systems, Inc. has introduced the Cadence SOI Design Hub, a new Web portal that lowers the barriers to adopting silicon-on-insulator (SOI) technology through comprehensive silicon-proven design enablement solutions and services. The SOI Design Hub is aimed at reducing SOI adoption start-up costs, cutting time to market for SOI intellectual property (IP), and improving design quality.

Mentor Graphics Corporation today announced the immediate availability of Calibre® xACT 3D product for high performance parasitic RC extraction featuring the high accuracy of a deterministic field solver combined with the performance of traditional, rule-based production extraction tools.

Magma® Design Automation has become a founding member of the Open Process Design Kit (OpenPDK) Coalition sponsored by The Silicon Integration Initiative (Si2).

Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC) today introduced Reference Flow 11.0 and Analog/Mixed Signal (AMS) Reference Flow 1.0. Both are key collaborative components of TSMC's recently-announced extension of its Open Innovation Platform. Reference Flow 11.0, focuses on Electronic System Level (ESL) design, SoC Interconnect Fabric, and two dimensional and three dimensional integrated circuits (2-D/3-D ICs) using through silicon via (TSV) technology. AMS Reference Flow 1.0 offers advanced multi-vendor AMS design flow fully integrated with an innovative TSMC AMS design package to manage the growing complexity of process effects as well as design complexity at 40nm and 28nm process nodes.

Magma Design Automation (Nasdaq: LAVA) announced a collaborative effort with MagmaTies Partner SynTest Technologies, Inc. to integrate SynTest DFT PRO Plus products into Magma’s Talus RTL-to-GDSII IC design flow. The integration complements Magma’s scan-based DFT methodology and mutual customers have validated the flow.